The present invention relates to a receiver for receiving a radio signal and a phase extraction circuit for extracting the phase of the received signal.
Recently, in the field of mobile communication, radio communications are being digitized from the viewpoint of enhancement of secrecy and privacy, versatile services of data communications, and effective use of frequency resources. Phase modulation is widely used in digital mobile radio communication, for example, in Personal Handy-phone System (PHS), xcfx80/4 shift Quatenary Phase Shift Keying (QPSK) is employed. To demodulate the phase modulated signal, the signal phase must be extracted.
FIG. 8 is a block diagram showing a conventional phase extraction circuit. In FIG. 8, the received signal is binarized in the amplitude by an A/D converter 1 of one bit, and becomes binarized data. In a sampling unit 3, the binarized data issued from the A/D converter 1 is sampled at a sufficiently high frequency oscillated at an oscillator 2. An edge detecting section 4 detects a rising edge (the portion changing from L level to H level) or a falling edge (the portion changing from H level to L level) from the sampling data issued from the sampling unit 3. A position detecting section 5 determines the phase from the difference between the position of the edge detected by the edge detecting section 4 and the reference position.
In the conventional phase extraction circuit, however, a high frequency must be oscillated as the sampling frequency. When the system timing frequency is high, the number of times of transition per unit time (the number of times of shifting to the transition zone causing power consumption) increases in the CMOS transistor for switching at this frequency. As a result, the power consumption of the receiver is increased. To save the power consumption, if the sampling frequency is lowered to be close to the frequency of the received signal, the phase resolution is not achieved.
Incidentally, in a constitution in which the phase of signal is extracted by lowering the received signal to a low frequency, very high frequency is not needed as the sampling frequency, but the filter and other parts corresponding to low frequency are large in size, and the device size cannot be reduced.
It is hence an object of the invention to present a phase extraction circuit capable of extracting phase at high resolution if the sampling frequency is close to the frequency of received signal.
To achieve the object, the receiver of the invention comprises:
(a). a frequency converter for lowering a received signal to an intermediate frequency,
(b). a sampling unit for sampling the signal lowered to the intermediate frequency at a sampling frequency selected around the intermediate frequency,
(c). a detecting section for detecting the position of a continuous portion of the same value occurring in a sampling data row obtained in the sampling unit, and
(d). a phase information converter for converting the information of the continuous position in this sampling data row to phase information of the signal lowered to the intermediate frequency.
In this constitution, since the position of continuous portion is determined only by the phase of the input signal, by detecting the continuous position, the phase of the input signal can be easily obtained from the information of the continuous position. Moreover, without lowering to a low frequency, it is possible to demodulate at the intermediate frequency, so that the circuit can be substantially simplified.
A first constitution of the phase extraction circuit of the invention comprises:
(a). an A/D converter for binarizing the amplitude of an input signal, and issuing binarized data,
(b). an oscillator for generating a timing signal for sampling,
(c). a sampling unit for sampling the binarized data at a frequency of timing signal, and issuing sampling data,
(d). a framing unit for assembling plural sampling data into one frame,
(e). a continuous portion detecting section for detecting a portion of same value continuing at one side of the values of sampling data in one frame as a continuous portion,
(f). a position detecting section for detecting the position of the continuous portion in one frame as a continuous portion position,
(g). a phase correspondence table for preliminarily describing one-to-one relation of the continuous portion position in one frame and the phase of input signal, and
(h). a phase allocation unit for determining the phase of input signal from the continuous portion position by using the phase correspondence table.
In the first constitution of the phase extraction circuit, since the position of continuous portion of same value is determined only by the phase of the input signal, by using the phase correspondence table preliminarily describing the one-to-one relation of continuous position and phase of input signal, the phase of the received signal can be easily obtained from the continuous portion position.
A second constitution of the phase extraction circuit of the invention is similar to the phase extraction circuit of the first constitution, and further comprises a position selector for selecting one continuous portion position if plural continuous portion positions of same value are present in one frame. In the second constitution of the phase extraction circuit, if plural continuous portion positions are present, the optimum continues portion position is selected, and the phase of the received signal may be obtained more easily.
A third constitution of the phase extraction circuit of the invention is similar to the phase extraction circuit of the first constitution, and further comprises a position averaging unit for determining the average position from plural continuous portion positions if plural continuous portion positions of same value are present in one frame. In the third constitution of the phase extraction circuit, if plural continuous portion positions are present, the average position thereof is determined, and the phase of the received signal may be obtained further easily.